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| Intelligent Double Low-Side Switch 2 x 0.5 A TLE 4214 G Bipolar IC Features q q q q q q q q Double low-side switch, 2 x 0.5 A Power limitation Overtemperature shutdown Overvoltage shutdown Status monitoring Shorted-load protection Integrated clamp diodes Temperature range - 40 to 125 C P-DSO-20-7 Type TLE 4214 G Application Ordering Code Q67000-A9094 Package P-DSO-20-7 (SMD) Applications in automotive electronics require intelligent power switches activated by logic signals, which are shorted-load protected and provide error feedback. This IC contains two of these power switches (low-side switches). In case of inductive loads the integrated clamp diodes clamp the discharging voltage. If a "high" signal is applied to the enable input both switches can be activated independently of one another with TTL signals at the control inputs (active high). The high impedance inputs should always be connected to a fixed potential (noise immunity). The status output (open collector) signals the following malfunctions with high potential: q q q q q Overload, Open load, Shorted load to ground, Overvoltage, Overtemperature. Semiconductor Group 294 10.96 TLE 4214 G Pin Configuration (top view) TLE 4214 G Semiconductor Group 295 TLE 4214 G Pin Definitions and Functions Pin No. 6, 16 10 2 Symbol GND IN2 Function Ground Design wiring for the max. short-circuit current (2 x 1 A) Control input 2 (TTL compatible) activates the output transistor 2 in case of high potential Supply voltage In case of overvoltage at this pin large sections of the circuit are deactivated. The status output indicates this malfunction without delay time. Output 2 Shorted load protected, open collector output for currents up to 0.5 A, with clamping diodes to supply voltage. Output 1 Shorted load protected, open collector output for currents up to 0.5 A, with clamping diodes to supply voltage. Enable input, active high Control input 1 (TTL-compatible) activates output transistor 1 in case of high potential Status output (open collector) for both outputs; indicates overtemperature, overload, open load and shorted load to ground as well as overvoltage at pin 3. It is switched to high after a defined delay time in case of malfunction (except: overvoltage) Not connected VS 7 Q2 5 Q1 9 1 15 ENA IN1 STA 3, 4, 8, 11 ... 14, 17 ... 20 N. C. Semiconductor Group 296 TLE 4214 G Block Diagram Semiconductor Group 297 TLE 4214 G Circuit Description Input Circuits The control inputs and the enable input consist of TTL-compatible Schmitt triggers with hysteresis. Controlled by these stages the buffer amplifiers drive the NPN power transistors. Switching Stages The output stages consist of NPN power transistors with open collectors. Since the protective circuit allocated to each stage limits the power dissipation, the outputs are shorted-load protected to the supply voltage throughout the entire operating range. Positive voltage peaks, which occur during the switching of inductive loads, are limited by the integrated clamp diodes. Monitoring and Protective Functions During the activated status the outputs are monitored for open load, overload, and shorted load to ground (see table below). In addition, large sections of the circuit are shut down in case of excessive supply voltages VS. Linked via OR gate the information regarding these malfunctions effects the status output (open collector, active high). An internally determined delay time applied to all malfunctions but overvoltage prevents the output of messages in case of short-term malfunctions. Furthermore, a temperature protection circuit prevents thermal overload. If overload occurs, the outputs are protected according to the safe operating area (SOA) mode (see diagram). If voltage and current are outside the SOA, the outputs oscillate to reduce the power dissipation. The switching frequency depends on the internal delay time and the external load (inductances and capacitances). If the frequency is low, the status output may follow the oscillation. An integrated reverse diode protects the supply voltage VS against reverse polarities. Similarly the load circuit is protected against reverse polarities within the limits established by the maximum ratings (no shorted load at the same time!). At supply voltages below the operating range an undervoltage detector ensures that neither the status nor the outputs are activated. At supply voltages below the operating range the output stages are de-activated. Semiconductor Group 298 TLE 4214 G Status Output (H = Error) Undervoltage > 3.5 V Operating Range Overvoltage VI = L (passive) L L L H H VI = H (active) L H H H H H H H H H Normal function Overload Open load Shorted output to ground Overtemperature L L L L L Semiconductor Group 299 TLE 4214 G Circuit Diagram Semiconductor Group 300 TLE 4214 G Absolute Maximum Ratings Tj = - 40 to 150 C Parameter Symbol min. Limit Values max. Unit Voltages Supply voltage, t < 0.2 s Supply voltage Input voltage Output voltage (status output) Output voltage (switching stages) VS VS VI VO VQ - - 1.3 - 13 - 0.3 - 0.3 70 40 40 40 + VS V V V V V Currents Output current (switching stages) Current with reverse polarity, t < 0.1 s Output current positive clamp Ground current Output current (status output) Junction temperature Storage temperature IQ IQ IQ IGND IO Tj Tstg internally limited - 0.7 - - 1.4 - - - 50 - - 0.7 2.0 10 150 150 - A A A mA C C Operating Range Supply voltage Supply voltage slew rate Output current (switching stages) Input voltage Output current (status output) Ambient temperature 1) VS dVS/dt 6 1) -1 - 0.5 -5 0 - 40 25 1 0.5 32 5 125 V V/s A V mA C IQ VI, VF IO TA Lower limit = 5 V, if previously VS greater than 6 V (turn-on hysteresis) Semiconductor Group 301 TLE 4214 G Absolute Maximum Ratings (cont'd) Tj = - 40 to 150 C Parameter Symbol min. Supply voltage while shorted load Thermal resistance junction to ambient Limit Values max. 15 77 V K/W Unit VS Rth JA - - Characteristics VS = 6 to 16 V (typ. VS = 12 V); Tj = - 40 to 150 C (typ. Tj = 25 C) Parameter Symbol Limit Values min. typ. max. Unit Test Condition General Characteristics Quiescent current Supply voltage Supply overvoltage shutdown threshold Hysteresis of supply overvoltage shutdown threshold Open load error threshold voltage Open load error threshold current Open load error threshold current for both channels active IS IS VSO VSO - - 30 4 2 35 37 6 4 50 42 9 mA mA V V VF < VFL VI = VI > VIH, VF > VFH VL = 5 V; VO > 4.5 V VL = 5 V; VO > 4.5 V VQ IQU IQU 5 1 - 20 - - 50 40 80 mV mA mA VL = 5 V; VO > 4.5 V VQ = VQU VQ1 = VQ2 = VQU Semiconductor Group 302 TLE 4214 G Characteristics (cont'd) VS = 6 to 16 V (typ. VS = 12 V); Tj = - 40 to 150 C (typ. Tj = 25 C) Parameter Symbol Limit Values min. typ. max. Unit Test Condition Logic Control inputs H-input voltage threshold VIH L-input voltage threshold VIL Hysteresis of control input voltage VI 1.3 0.9 0.2 1.8 1.2 0.6 2.1 1.5 1.0 V V V - - - Enable input H-input voltage threshold VFH L-input voltage threshold VFL Hysteresis of enable input voltage H-input current L-input current VF 1.6 1.4 0.1 0 0 2.1 1.8 0.3 - - 2.7 2.3 0.7 10 10 V V V A A - - - IIH - IIL VI = 5 V VI = 0.5 V Status Output (open collector) L-saturation voltage Status delay time 1) Vosat tdS 0.1 8 0.2 20 0.4 32 V s IO = 5 mA 1) Period from the beginning of the disturbance at one channel (exception: overvoltage) until the 50 % value of the status switching edge is reached. Semiconductor Group 303 TLE 4214 G Characteristics (cont'd) VS = 6 to 16 V (typ. VS = 12 V); Tj = - 40 to 150 C (typ. Tj = 25 C) Parameter Symbol Limit Values min. typ. max. Unit Test Condition Switching Stages Saturation voltage Saturation voltage Output current Leakage current Switch-ON time Switch-OFF time Forward voltage of substrate diode Forward voltage of clamp diode Leakage current of clamp diode VQSat VQSat IQ IQ tD ON tD OFF VQS VQF - IQF - - 0.5 -5 0.2 0.2 - - - 0.6 45 - - 0.5 2 1.3 1.3 - 0.8 100 V mV A A s s V V A IQ = 0.5 A; VI > VIH; VF > VFH IQ = 50 mA; VI > VIH; VF > VFH VQSat = 0.8 V; VI > VIH VQ = 6 V; VI < VIL IQ = 0.5 A see Timing IQ = 0.5 A Diagram IQ = - 0.5 A t < 0.1 s IQ = 0.5 A t < 0.1 s VQ = 0 V; VI < VIL 50 5 5 1.7 1.7 5 Semiconductor Group 304 TLE 4214 G Test Circuit Timing Diagram Semiconductor Group 305 TLE 4214 G Application Circuit Semiconductor Group 306 TLE 4214 G Quiescent Current IS versus Ambient Temperature TA in the OFF-Status VS = 12 V; VF < VFL Shorted Load Current IQ0 versus Output Voltage VQ Output Voltage VQ versus Output Current VS = 12 V; VI > VIH Semiconductor Group 307 TLE 4214 G Equal current at both channels First channel 50 mA, second channel IQ Only one channel in operation Semiconductor Group 308 TLE 4214 G Package Outlines P-DSO-20-7 (Plastic Dual Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Dimensions in mm Semiconductor Group 309 GPSO5094 |
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